1. Field of the Invention
The present invention relates to the field of semiconductor devices and more specifically to a silicon on insulator (SOI) transistor and methods of fabrication.
2. Discussion of Related Art
In order to increase device performance, silicon on insulator (SOI) transistors have been proposed for the fabrication of modern integrated circuits. FIG. 1 illustrates a standard partially depleted silicon on insulator (SOI) transistor 100. SOI transistor 100 includes a single crystalline silicon substrate 102 having an insulating layer 104, such as a buried oxide formed thereon. A single crystalline silicon film body 106 is formed on the insulating layer 104. A gate dielectric layer 108 is formed on the single crystalline silicon body 106 and a gate electrode 110 formed on the gate dielectric 108. Source and drain regions 112 and 114 are formed in silicon body 106 along laterally opposite sides of gate electrode 110.
There are presently a couple different methods of forming SOI substrates where an single crystalline silicon body 106 is formed on an insulating layer 104 which inturn is formed on a single crystalline silicon substrate. In one method of forming a silicon on insulator (SOI) substrate, known as the SIMOX technique, oxygen atoms are implanted at a high dose into a single crystalline silicon substrate and annealed to form the buried oxide 104 within the substrate. The portion of the single crystalline silicon substrate above the buried oxide becomes the silicon body. Another technique currently used to form SOI substrates is an epitaxial silicon film transferred technique. Another technique currently used to form SOI substrates is generally referred to as bonded SOI. In this technique a first silicon wafer has a thin oxide grown on its surface that will later serve as the buried oxide in the SOI structure. Next a high dose hydrogen implant is done to form a high stress region below the silicon wafer surface. This first wafer is then flipped over and bonded to the surface of a second silicon wafer. The first wafer is then cleaved along the high stress plane created by the hydrogen implant. This results in the SOI structure with a thin silicon layer on top, buried oxide underneath, all on top of a single crystal silicon substrate.
A problem with the bonded technique and the oxygen implant technique for forming SOI wafers or substrates, is that they cannot form thin, less than 100 nm uniform epitaxial silicon body films. As such, the silicon body 106 of an SOI transistor formed with these techniques have thicknesses of greater than 100 nanometers. As such, when the SOI transistor is in operation and “turned ON” and the channel region 120 of the device inverts into the conductivity of the source/drain regions to form a conductive channel therebetween the inverted conductive channel region 120 does not completely invert or deplete the entire thickness of the silicon body. As such, the SOI transistor is considered a partially depleted SOI transistor and not a fully depleted transistor. In order to fully deplete the silicon body, the silicon body film would need to be less than 30 nm. A fully depleted SOI transistor has better electrical performance and characteristics than does a partially depleted SOI transistor. As such, present techniques are unable to fabricate fully depleted SOI transistors.